1. Field of the Invention
The present invention relates to a photoelectric converting device adapted for use in an image input device in a camcorder, an image scanner, a facsimile machine, an auto focusing device or the like.
2. Related Background Art
In the field of photoelectric converting devices, in consideration of the decrease in the photoelectrically converted output signal resulting from the increase in the number of pixels of such devices, amplifying photoelectric converting devices, capable of amplifying the photoelectrically converted signal, are recently attracting attention. Among such amplifying devices, there is known a photoelectric converting device of which structure is similar to the bipolar or unipolar transistor and which accumulates a charge, generated by light irradiation, in the base area or in the gate area constituting a control electrode area and releases an amplified signal from the emitter or source area constituting a main electrode area (such device being hereinafter called amplifying sensor).
Such photoelectric converting device is disclosed, for example, by "A 310K Pixel Bipolar Imager (BASIS)", IEEE Transactions on Electron Devices, Vol. 37, No. 4, April 1990, pp 964-971, and by "A New Device Architecture Suitable for High-Resolution and High-Performance Image Sensors", IEEE Transactions on Electron Devices, Vol. 35, No. 5, May 1988, pp 646-652.
FIG. 16 is a plan view of a pixel employing a conventional bipolar transistor sensor, wherein shown are an emitter area (constituting a first main electrode area) 1; an output line 2 composed for example of aluminum; a contact hole 3 for connecting the emitter area 1 with the output line 2; a base area (constituting a control electrode area) 4 for accumulating photoinduced charge; a drive line 5 composed for example of polysilicon for effecting the sensor operation of the pixel; an electrode 6 forming a capacitance C.sub.OX between the base area 4 and the drive line 5; a gate (control) electrode 7, formed in a part of the drive line 5, of a p-MOS transistor (indicated by a broken-lined area M in FIG. 17) of which source and drain areas are composed of the base areas of the adjacent pixels; and a thick oxide film (field oxide film) 8 for separating pixels.
FIGS. 17 and 18 are cross-sectional views respectively along lines X-X' and Y-Y' in FIG. 16. In FIGS. 17 and 18 there are shown a thin oxide film 9; an n.sup.+ layer 10 of a high impurity concentration for device isolation, for separating the pixel signals in the Y-Y' direction; an n.sup.- layer 11 of a low impurity concentration in which the depletion layer is to spread; a collector area 12 (constituting a second main electrode area); and an interlayer insulation film 13 for separating the wirings 2, 5.
As shown in FIG. 17, a resetting p-MOS transistor M (indicated by a broken-lined circle) is formed in the horizontal separating area between the pixels. When the gate of said p-MOS transistor is turned on, the base areas 4 of two pixels adjacent along the X-X' direction are connected, whereby resetting is achieved. When the gate is turned off, the p-MOS transistor M serves as the pixel separating means.
FIG. 19 is an equivalent circuit diagram of the photoelectric converting device mentioned above. In FIG. 19, a pixel 21 is represented as composed of a bipolar phototransistor T, a capacitance C.sub.OX connected to the base, and a p-MOS transistor M. There are also shown vertical output lines 22 connected to the emitters of the pixels 21; MOS transistors 23 for resetting the vertical output lines 22; accumulating capacitances 24 for accumulating the output signals from the pixels 21; MOS transistors 25 for transferring the output signals to the accumulating capacitances 24; MOS transistors 26 for transferring the output signals to a horizontal output line 27 in response to output signals of a horizontal shift register; a MOS transistor 28 for resetting the horizontal output line 27; a pre-amplifier 29; horizontal drive lines 30; buffer MOS transistors 31 for passing sensor drive pulses in response to the output of a vertical shift register; an emitter-follower circuit 32 for setting the source potential of the p-MOS transistors in order to effect clamping operations of the pixels 21; a p-MOS transistor 33 for setting the base potential of the emitter-follower circuit 32; a terminal 34 for applying a pulse to the gates of the MOS transistors 23; a terminal 35 for applying a pulse to the gates of the MOS transistors 25; a terminal 36 for applying sensor drive pulses; a terminal 37 for applying a pulse to the gate of the p-MOS transistor 33; and an output terminal 38 connected to the pre-amplifier 29.
The two-dimensional solid-state image pickup device shown in FIG. 19 is of a type in which all the pixels can be reset at a time, and is preferably applied for example in a still video camera.
Next the function of the above-discussed device will be explained. The function of the two-dimensional solid-state image pickup device consists of a resetting operation, an accumulating operation, and a read-out operation, and the resetting operation is composed of a first resetting and a second resetting.
FIG. 20 shows the potential change in various parts of the bipolar sensor in those operations, wherein shown are the potential .phi..sub.R of the horizontal drive line 30, base potential V.sub.B of the bipolar transistor, and emitter potential V.sub.E of the bipolar transistor T:
1. Resetting operation
(1) First resetting
The first resetting (t.sub.c -t.sub.d in FIG. 20) is to turn on the resetting p-MOS transistor M, thereby bringing the base area to a predetermined potential.
At first a low-level pulse is applied to the terminal 37 shown in FIG. 19, thereby turning on the p-MOS transistor 33 to shift the output of the emitter-follower circuit 32 to a positive potential. That output is supplied to the source of the p-MOS transistor M of each pixel, and, if the source potential becomes high enough, in comparison with the gate potential .phi..sub.R, for turning on the p-MOS transistor M, holes are injected through the p-MOS transistor to the base of the bipolar transistor T of each pixel.
Then a high-level pulse is applied to the terminal 37 to turn off the p-MOS transistor 33, thereby shifting the output of the emitter-follower circuit 32 to the ground potential.
(2) Second resetting:
The second resetting (t.sub.d -t.sub.e in FIG. 20) shifts .phi..sub.R to a positive potential while maintaining the emitter of the bipolar transistor T in grounded state. In this state the base potential V.sub.b1 is elevated to: EQU V.sub.b1 =C.sub.OX /(C.sub.OX +C.sub.BC +C.sub.BE).times.V.sub.R
wherein C.sub.BC is the base-collector capacitance, C.sub.BE is the base-emitter capacitance, and V.sub.R is the amplitude voltage of .phi..sub.R. In this state a forward bias is applied between the base and the emitter, and the base potential is lowered by the recombination of electron and positive holes. Subsequently the potential .phi..sub.R is returned to the ground potential, and an inverse bias is applied between the base and the emitter to initiate the next accumulating operation.
More specifically, a high-level pulse is applied to the terminal 34 shown in FIG. 19 to turn on the transistors 23 thereby grounding the vertical output lines 22. In this state the vertical shift register is activated and reset pulses are applied to the terminal 36, thereby resetting the pixels in successive rows. In this manner the bases of the bipolar transistors T of all the pixels are brought to a predetermined potential in an inversely biased state, in preparation for the next accumulating operation.
2. Accumulating operation
The accumulating operation starts at the completion of the above-explained resetting operation (t.sub.a in FIG. 20), when an inverse bias is applied between the base and the emitter of the bipolar transistor T. The base potential is elevated as the positive holes, generated by the incident light in the depletion layer between the base and the collector, are accumulated in the base area.
3. Read-out operation
The emitter of the bipolar transistor T is left floating, and the potential .phi..sub.R is shifted to a positive value to elevate the base potential by the capacitance coupling through C.sub.OX to create a forward bias state between the base and the emitter, whereby the read-out operation is initiated (t.sub.b in FIG. 20). As the potential of the emitter, connected to a capacitative load, reaches a certain potential difference to the base potential at the end of the read-out operation (t.sub.c in FIG. 20), the variations (V.sub.P1, V.sub.P2) in the base potential at the accumulating operation appear on the emitter terminal.
More specifically, a low-level pulse is applied to the terminal 34 shown in FIG. 19 to turn off the MOS transistors 23, and, for each row selected by the output of the vertical shift register, a read-out pulse is supplied from the terminal 36 to accumulate the output signals in the accumulating capacitances 24 through the MOS transistors 25. Thus accumulated output signals are subsequently transferred to the horizontal output line 27 through the transfer MOS transistors 26 selected in succession by the horizontal shift register, and released from the output terminal 38 through the pre-amplifier 29.
In the conventional amplifying sensor explained above, since the output of the sensor is inversely proportional to the capacitance of the sensor cell, it is desirable to widen the depletion layer between the base and the collector and to reduce the base-collector capacitance. However, since such configuration enhances the dark current generated from the depletion layer between the base and the collector, the fluctuation in the dark currents in the sensor cells has been a cause of the fixed pattern noise (FPN), and this is a first drawback to be resolved in the present invention.
Also in the conventional amplifying sensor explained above, capacitative coupling with the base area is provided by the MOS capacitance (C.sub.OX) utilizing a polysilicon electrode formed on the base. Such configuration leads to the following additional drawbacks:
(1) a lowered blue light sensitivity due to the formation of the polysilicon electrode on the aperture where incident light enters; PA1 (2) an increased dark current due to the depletion of the interface between the oxide film under the polysilicon electrode and the base area; and PA1 (3) an increased fluctuation of the capacitance C.sub.OX, leading to fixed pattern noise, because of the fluctuation in the precision of the polysilicon electrode which is prepared in a non-self aligned process.